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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] - Rev 437

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Rev Log message Author Age Path
437 Or1ksim - ethernet peripheral update, working much better. julius 5072d 18h /openrisc/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5073d 18h /openrisc/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 5073d 19h /openrisc/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5077d 00h /openrisc/
433 New single program interrupt test programs. jeremybennett 5078d 02h /openrisc/
432 Updates to handle interrupts correctly. jeremybennett 5078d 03h /openrisc/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 5080d 02h /openrisc/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5081d 00h /openrisc/
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 5081d 03h /openrisc/
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5083d 23h /openrisc/
427 Fixes for C++ to correspond to fixes in uClibc. jeremybennett 5085d 08h /openrisc/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...
julius 5086d 18h /openrisc/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 5086d 19h /openrisc/
424 C++ library, needed for C++ compiler. jeremybennett 5087d 05h /openrisc/
423 Minor typo fixed. jeremybennett 5087d 08h /openrisc/
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 5087d 08h /openrisc/
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".
julius 5090d 06h /openrisc/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5092d 04h /openrisc/
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 5092d 07h /openrisc/
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5092d 07h /openrisc/

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