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Rev Log message Author Age Path
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 5015d 15h /openrisc/
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 5015d 23h /openrisc/
451 More tidying up. jeremybennett 5019d 19h /openrisc/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 5019d 23h /openrisc/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 5021d 20h /openrisc/
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 5022d 06h /openrisc/
447 Updates to register order. jeremybennett 5022d 23h /openrisc/
446 gdb-7.2 gdbserver updates. julius 5023d 18h /openrisc/
445 gdbserver update to use kernel port ptrace register definitions. julius 5024d 15h /openrisc/
444 Changes to ABI handling of varargs. jeremybennett 5025d 00h /openrisc/
443 Work in progress on more efficient Ethernet. jeremybennett 5025d 03h /openrisc/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5025d 18h /openrisc/
441 Changes for gdbserver. jeremybennett 5026d 00h /openrisc/
440 Updated documentation to describe new Ethernet usage. jeremybennett 5026d 19h /openrisc/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 5028d 23h /openrisc/
438 Fix to newlib header and library locations. jeremybennett 5032d 00h /openrisc/
437 Or1ksim - ethernet peripheral update, working much better. julius 5034d 14h /openrisc/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5035d 14h /openrisc/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 5035d 15h /openrisc/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5038d 20h /openrisc/

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