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[/] [openrisc/] - Rev 461

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Rev Log message Author Age Path
461 Updated to be much stricter about usage. jeremybennett 4954d 01h /openrisc/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4954d 03h /openrisc/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4954d 09h /openrisc/
458 or1ksim testsuite updates julius 4955d 07h /openrisc/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4963d 21h /openrisc/
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4963d 22h /openrisc/
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4968d 00h /openrisc/
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4970d 02h /openrisc/
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4970d 13h /openrisc/
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4970d 21h /openrisc/
451 More tidying up. jeremybennett 4974d 17h /openrisc/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4974d 21h /openrisc/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 4976d 18h /openrisc/
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4977d 04h /openrisc/
447 Updates to register order. jeremybennett 4977d 21h /openrisc/
446 gdb-7.2 gdbserver updates. julius 4978d 16h /openrisc/
445 gdbserver update to use kernel port ptrace register definitions. julius 4979d 13h /openrisc/
444 Changes to ABI handling of varargs. jeremybennett 4979d 22h /openrisc/
443 Work in progress on more efficient Ethernet. jeremybennett 4980d 01h /openrisc/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4980d 16h /openrisc/

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