URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.4.0rc2/] [testsuite/] [test-code/] [lib-jtag/] - Rev 121

Rev	Log message	Author	Age	Path
121	Adds exception handling to l.jalr and l.jr. Adds appropriate tests.	jeremybennett	5176d 05h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/
118	New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library.	jeremybennett	5177d 02h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/
104	Candidate release 0.4.0rc4	jeremybennett	5187d 12h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/
101	ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c	jeremybennett	5196d 06h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5202d 08h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5216d 14h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code/lib-jtag/