OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.4.0rc2/] [testsuite/] [test-code-or1k/] [mc-sync/] - Rev 110

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
110 or1ksim make check should work without a libc in the or32-elf tools julius 5246d 07h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5260d 07h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5266d 09h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5280d 15h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5283d 08h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5294d 06h /openrisc/tags/or1ksim/or1ksim-0.4.0rc2/testsuite/test-code-or1k/mc-sync/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.