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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [cpu/] [common/] - Rev 202

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Rev Log message Author Age Path
202 Adding executed log in binary format capability to or1ksim julius 5140d 11h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5172d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5173d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5174d 06h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5178d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5193d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
100 Single precision FPU stuff for or1ksim julius 5193d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5199d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5213d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5214d 19h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
91 Tidy up of some obsolete configuration code. jeremybennett 5227d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5227d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5228d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
80 Add missing configuration files to SVN. jeremybennett 5228d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5558d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu/common/

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