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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [doc/] - Rev 224

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224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5128d 02h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5134d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
202 Adding executed log in binary format capability to or1ksim julius 5140d 21h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5157d 22h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
134 Updates for stable release 0.4.0 jeremybennett 5166d 02h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
127 New config option to allow l.xori with unsigned operand. jeremybennett 5171d 22h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5172d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5172d 22h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5173d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5174d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5176d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5178d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5179d 20h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5181d 19h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
104 Candidate release 0.4.0rc4 jeremybennett 5185d 02h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5193d 20h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
100 Single precision FPU stuff for or1ksim julius 5193d 22h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
99 Bug in test evaluation for library fixed. jeremybennett 5198d 20h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5199d 21h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5214d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/

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