OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [mmu/] - Rev 226

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5098d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5098d 07h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5144d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5144d 21h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5164d 01h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5170d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5184d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5185d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
91 Tidy up of some obsolete configuration code. jeremybennett 5197d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5198d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5199d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
80 Add missing configuration files to SVN. jeremybennett 5199d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5529d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/mmu/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.