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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] - Rev 127

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127 New config option to allow l.xori with unsigned operand. jeremybennett 5138d 15h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5139d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5139d 15h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
122 Added l.ror and l.rori with associated tests. jeremybennett 5140d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5140d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5141d 09h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5143d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5144d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5144d 13h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5145d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5146d 13h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5148d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
106 Removing old tests, pending addition of new ones. jeremybennett 5148d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
104 Candidate release 0.4.0rc4 jeremybennett 5151d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5160d 13h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
100 Single precision FPU stuff for or1ksim julius 5160d 15h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
99 Bug in test evaluation for library fixed. jeremybennett 5165d 13h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5166d 15h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5180d 21h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5181d 22h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/

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