OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] [testsuite/] [test-code/] [lib-iftest/] - Rev 234

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5092d 16h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
233 New softfloat FPU and testfloat sw for or1ksim julius 5093d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5094d 08h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5096d 08h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5103d 07h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5142d 08h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5143d 05h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5162d 10h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5168d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5182d 17h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5185d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
91 Tidy up of some obsolete configuration code. jeremybennett 5196d 08h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5196d 09h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/test-code/lib-iftest/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.