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Rev Log message Author Age Path
653 Make gdb link to or1ksim's libsim last, so wrapper works yannv 4779d 12h /openrisc/trunk/
652 Fix make compile.tcl for actel backend yannv 4779d 12h /openrisc/trunk/
651 ORPSoC: The ability to use a free/gimped version of Modelsim was restricted to
the reference build's scripts. This patch adds support for it to the
scripts for the board builds as well.

Signed-off-by: Julius Baxter <julius at opencores.org>
acked-by: Stefan Kristiansson <stefan.kristiansson at saunalahti.fi>		 julius 4784d 07h /openrisc/trunk/
650 ORPSoC: documentation update to fix explanation of Xilinx environment setup, add section for Atlys board, various cleanups julius 4785d 05h /openrisc/trunk/
649 porting some of standard demo tasks

fix serial port(UART) interrupt handler		 filepang 4801d 10h /openrisc/trunk/
648 docs: OR1K architecture now labeled as revision 0 in draft spec julius 4804d 06h /openrisc/trunk/
647 or1200: update documentation to go with recent rtl commits julius 4804d 06h /openrisc/trunk/
646 Support ORSoC FT4232 board by using second JTAG; should make a command line option. yannv 4807d 16h /openrisc/trunk/
645 or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated julius 4822d 06h /openrisc/trunk/
644 or1200: the infamous l.rfe fix, and bug fix for when multiply is disabled julius 4822d 07h /openrisc/trunk/
643 or1200: new ALU comparision implementation option, TLB invalidate register indicated as not present, multiply overflow detection bug fix julius 4822d 07h /openrisc/trunk/
642 or1200: add carry, overflow bits, and range exception julius 4822d 07h /openrisc/trunk/
641 or1200: fix serial multiply/divide bug julius 4822d 07h /openrisc/trunk/
640 or1200: add l.ext instructions, fix a MAC bug julius 4822d 07h /openrisc/trunk/
639 or1200: or1200_dpram.v change task set_gpr to function julius 4822d 07h /openrisc/trunk/
638 orpsoc: xilinx: use XILINX env variable

instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4825d 22h /openrisc/trunk/
637 porint parallel port(gpio) management task filepang 4828d 11h /openrisc/trunk/
636 porting serial port management task, interrupt hander filepang 4828d 11h /openrisc/trunk/
635 Patch for http://bugzilla.opencores.org/show_bug.cgi?id=69.

* config/or32/linux-elf.h <TARGET_OS_CPP_BUILTINS>: Defined, based
on LINUX_TARGET_OS_CPP_BUILTINS copied from linux.h.		 jeremybennett 4829d 15h /openrisc/trunk/
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file		 stekern 4830d 22h /openrisc/trunk/

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