OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] - Rev 448

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4972d 12h /openrisc/trunk/
447 Updates to register order. jeremybennett 4973d 06h /openrisc/trunk/
446 gdb-7.2 gdbserver updates. julius 4974d 01h /openrisc/trunk/
445 gdbserver update to use kernel port ptrace register definitions. julius 4974d 21h /openrisc/trunk/
444 Changes to ABI handling of varargs. jeremybennett 4975d 06h /openrisc/trunk/
443 Work in progress on more efficient Ethernet. jeremybennett 4975d 10h /openrisc/trunk/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4976d 00h /openrisc/trunk/
441 Changes for gdbserver. jeremybennett 4976d 07h /openrisc/trunk/
440 Updated documentation to describe new Ethernet usage. jeremybennett 4977d 02h /openrisc/trunk/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 4979d 06h /openrisc/trunk/
438 Fix to newlib header and library locations. jeremybennett 4982d 06h /openrisc/trunk/
437 Or1ksim - ethernet peripheral update, working much better. julius 4984d 20h /openrisc/trunk/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4985d 20h /openrisc/trunk/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 4985d 21h /openrisc/trunk/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4989d 03h /openrisc/trunk/
433 New single program interrupt test programs. jeremybennett 4990d 05h /openrisc/trunk/
432 Updates to handle interrupts correctly. jeremybennett 4990d 06h /openrisc/trunk/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 4992d 05h /openrisc/trunk/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4993d 02h /openrisc/trunk/
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 4993d 06h /openrisc/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.