OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] - Rev 473

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5012d 21h /openrisc/trunk/
472 Various changes which improve the quality of the tracing. jeremybennett 5012d 22h /openrisc/trunk/
471 Adding ucos-ii port. julius 5015d 01h /openrisc/trunk/
470 ORPSoC OR1200 crt0 updates. julius 5015d 20h /openrisc/trunk/
469 newlib update - added zeroing of r0 to crt0.S julius 5016d 21h /openrisc/trunk/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 5016d 21h /openrisc/trunk/
467 ORPmon - bug fixes and clean up. julius 5017d 19h /openrisc/trunk/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README		 julius 5018d 01h /openrisc/trunk/
465 ORPSoC SPI flash load Makefile and README updates. julius 5018d 15h /openrisc/trunk/
464 More ORPmon updates. julius 5018d 16h /openrisc/trunk/
463 ORPmon update julius 5018d 18h /openrisc/trunk/
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.		 julius 5019d 00h /openrisc/trunk/
461 Updated to be much stricter about usage. jeremybennett 5020d 19h /openrisc/trunk/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5020d 20h /openrisc/trunk/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 5021d 02h /openrisc/trunk/
458 or1ksim testsuite updates julius 5022d 01h /openrisc/trunk/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 5030d 15h /openrisc/trunk/
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 5030d 16h /openrisc/trunk/
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 5034d 18h /openrisc/trunk/
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 5036d 20h /openrisc/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.