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Rev Log message Author Age Path
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.		 julius 5047d 18h /openrisc/trunk/
476 ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. julius 5048d 11h /openrisc/trunk/
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 5048d 14h /openrisc/trunk/
474 uC/OS-II port linker flags updated. julius 5048d 19h /openrisc/trunk/
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5049d 14h /openrisc/trunk/
472 Various changes which improve the quality of the tracing. jeremybennett 5049d 15h /openrisc/trunk/
471 Adding ucos-ii port. julius 5051d 18h /openrisc/trunk/
470 ORPSoC OR1200 crt0 updates. julius 5052d 14h /openrisc/trunk/
469 newlib update - added zeroing of r0 to crt0.S julius 5053d 15h /openrisc/trunk/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 5053d 15h /openrisc/trunk/
467 ORPmon - bug fixes and clean up. julius 5054d 12h /openrisc/trunk/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README		 julius 5054d 18h /openrisc/trunk/
465 ORPSoC SPI flash load Makefile and README updates. julius 5055d 08h /openrisc/trunk/
464 More ORPmon updates. julius 5055d 09h /openrisc/trunk/
463 ORPmon update julius 5055d 12h /openrisc/trunk/
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.		 julius 5055d 17h /openrisc/trunk/
461 Updated to be much stricter about usage. jeremybennett 5057d 12h /openrisc/trunk/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5057d 14h /openrisc/trunk/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 5057d 20h /openrisc/trunk/
458 or1ksim testsuite updates julius 5058d 18h /openrisc/trunk/

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