OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [bootloaders/] - Rev 494

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 5049d 16h /openrisc/trunk/bootloaders/
464 More ORPmon updates. julius 5050d 13h /openrisc/trunk/bootloaders/
463 ORPmon update julius 5050d 15h /openrisc/trunk/bootloaders/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 5095d 11h /openrisc/trunk/bootloaders/
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 5107d 16h /openrisc/trunk/bootloaders/
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 5116d 06h /openrisc/trunk/bootloaders/
405 ORPmon updates - ethernet driver updates julius 5116d 10h /openrisc/trunk/bootloaders/
389 SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin
tac2 5134d 14h /openrisc/trunk/bootloaders/
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 5155d 12h /openrisc/trunk/bootloaders/
355 Adding CoreMark to ORPmon, updated Dhrystone test output julius 5170d 11h /openrisc/trunk/bootloaders/
353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.
julius 5171d 12h /openrisc/trunk/bootloaders/
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5187d 09h /openrisc/trunk/bootloaders/
195 Adding linux and uClibc paths back for patches, updated gnu-src build script making newlib an option (off by deafult) julius 5227d 15h /openrisc/trunk/bootloaders/
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5230d 12h /openrisc/trunk/bootloaders/
175 Moved orpmon into bootloaders julius 5237d 13h /openrisc/trunk/bootloaders/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.