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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [or32/] - Rev 853

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Rev Log message Author Age Path
842 Moving GDB 7.1 into the old collection. jeremybennett 4259d 07h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
834 Move current version to stable directory. jeremybennett 4267d 06h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
816 Restructuring to put all except the current stable version in a separate directory. jeremybennett 4267d 06h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
357 Tidied up commenting. jeremybennett 5032d 12h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
244 Don't try to skip prologue using SAL info (fails with STABS). Fuller check of prologue. Change register names to rnn from gprnn to match assembler. Add debug option to simulator wrapper.

* or32-tdep.c (or32_register_name): Changed to rnn rather than
gprnn to mach the assembler.
(or32_is_arg_reg, or32_is_callee_saved_reg): Added.
(or32_skip_prologue): Don't use skip_prologue_using_sal. Check for
argument as well as callee saved registers in prologue.
(or32_frame_cache):Check for argument as well as callee saved
registers in prologue.

* wrapper.c: OR32_SIM_DEBUG added to control debug messages.
(sim_close, sim_load, sim_create_inferior, sim_fetch_register)
(sim_stop): Debug statement added.
(sim_read, sim_write): Debug statements now controlled by
OR32_SIM_DEBUG.
(sim_store_register, sim_resume): Debug statement added and
existing debug statements now controlled by OR32_SIM_DEBUG.		 jeremybennett 5053d 09h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
237 Fixes bug in handling single stepping. jeremybennett 5069d 02h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
232 Brought documentation up to date. jeremybennett 5071d 07h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/
227 GDB 7.1 for OpenRISC 1000. Initial checkin. jeremybennett 5073d 00h /openrisc/trunk/gnu-old/gdb-7.1/sim/or32/

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