OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] - Rev 478

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
472 Various changes which improve the quality of the tracing. jeremybennett 4950d 02h /openrisc/trunk/or1ksim/
461 Updated to be much stricter about usage. jeremybennett 4957d 23h /openrisc/trunk/or1ksim/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4958d 00h /openrisc/trunk/or1ksim/
458 or1ksim testsuite updates julius 4959d 04h /openrisc/trunk/or1ksim/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4967d 19h /openrisc/trunk/or1ksim/
451 More tidying up. jeremybennett 4978d 15h /openrisc/trunk/or1ksim/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4978d 19h /openrisc/trunk/or1ksim/
443 Work in progress on more efficient Ethernet. jeremybennett 4983d 23h /openrisc/trunk/or1ksim/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4984d 13h /openrisc/trunk/or1ksim/
440 Updated documentation to describe new Ethernet usage. jeremybennett 4985d 15h /openrisc/trunk/or1ksim/
437 Or1ksim - ethernet peripheral update, working much better. julius 4993d 09h /openrisc/trunk/or1ksim/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4994d 09h /openrisc/trunk/or1ksim/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4997d 15h /openrisc/trunk/or1ksim/
433 New single program interrupt test programs. jeremybennett 4998d 18h /openrisc/trunk/or1ksim/
432 Updates to handle interrupts correctly. jeremybennett 4998d 19h /openrisc/trunk/or1ksim/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5001d 15h /openrisc/trunk/or1ksim/
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 5001d 19h /openrisc/trunk/or1ksim/
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5004d 15h /openrisc/trunk/or1ksim/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5012d 20h /openrisc/trunk/or1ksim/
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5012d 22h /openrisc/trunk/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.