URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] - Rev 100

Rev	Log message	Author	Age	Path
100	Single precision FPU stuff for or1ksim	julius	5163d 11h	/openrisc/trunk/or1ksim/cpu/
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5169d 10h	/openrisc/trunk/or1ksim/cpu/
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5183d 16h	/openrisc/trunk/or1ksim/cpu/
96	Various changes which had not been picked up in earlier commits.	jeremybennett	5184d 17h	/openrisc/trunk/or1ksim/cpu/
91	Tidy up of some obsolete configuration code.	jeremybennett	5197d 06h	/openrisc/trunk/or1ksim/cpu/
90	Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain).	jeremybennett	5197d 07h	/openrisc/trunk/or1ksim/cpu/
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5198d 07h	/openrisc/trunk/or1ksim/cpu/
80	Add missing configuration files to SVN.	jeremybennett	5198d 10h	/openrisc/trunk/or1ksim/cpu/
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5528d 16h	/openrisc/trunk/or1ksim/cpu/