OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] - Rev 865

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
784 Patch from R Diez to ensure DejaGnu handles errors better. Autoconf infrastructure all updated.

2012-03-21 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* Makefile.am: Add AM_RUNTESTFLAGS to trigger correct error
behaviour.
jeremybennett 4455d 02h /openrisc/trunk/or1ksim/cpu/common/
625 Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. jeremybennett 4674d 10h /openrisc/trunk/or1ksim/cpu/common/
556 or1ksim - added performance counters unit and test for it. julius 4744d 02h /openrisc/trunk/or1ksim/cpu/common/
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4745d 11h /openrisc/trunk/or1ksim/cpu/common/
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4772d 07h /openrisc/trunk/or1ksim/cpu/common/
472 Various changes which improve the quality of the tracing. jeremybennett 4888d 13h /openrisc/trunk/or1ksim/cpu/common/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4896d 12h /openrisc/trunk/or1ksim/cpu/common/
458 or1ksim testsuite updates julius 4897d 16h /openrisc/trunk/or1ksim/cpu/common/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4906d 06h /openrisc/trunk/or1ksim/cpu/common/
440 Updated documentation to describe new Ethernet usage. jeremybennett 4924d 02h /openrisc/trunk/or1ksim/cpu/common/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4932d 21h /openrisc/trunk/or1ksim/cpu/common/
432 Updates to handle interrupts correctly. jeremybennett 4937d 06h /openrisc/trunk/or1ksim/cpu/common/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4940d 03h /openrisc/trunk/or1ksim/cpu/common/
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 4943d 02h /openrisc/trunk/or1ksim/cpu/common/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4951d 07h /openrisc/trunk/or1ksim/cpu/common/
346 Changes to support Or1ksim 0.5.0rc1

Top level changes:

* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.

Changes in testsuite:

* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.

Changes in testsuite/test-code-or1k:

* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
jeremybennett 5016d 10h /openrisc/trunk/or1ksim/cpu/common/
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5050d 05h /openrisc/trunk/or1ksim/cpu/common/
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5050d 10h /openrisc/trunk/or1ksim/cpu/common/
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5051d 11h /openrisc/trunk/or1ksim/cpu/common/
233 New softfloat FPU and testfloat sw for or1ksim julius 5051d 22h /openrisc/trunk/or1ksim/cpu/common/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.