OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] - Rev 132

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
127 New config option to allow l.xori with unsigned operand. jeremybennett 5265d 07h /openrisc/trunk/or1ksim/testsuite/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5266d 03h /openrisc/trunk/or1ksim/testsuite/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5266d 07h /openrisc/trunk/or1ksim/testsuite/
122 Added l.ror and l.rori with associated tests. jeremybennett 5267d 03h /openrisc/trunk/or1ksim/testsuite/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5267d 04h /openrisc/trunk/or1ksim/testsuite/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5268d 00h /openrisc/trunk/or1ksim/testsuite/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5270d 04h /openrisc/trunk/or1ksim/testsuite/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5271d 03h /openrisc/trunk/or1ksim/testsuite/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5271d 04h /openrisc/trunk/or1ksim/testsuite/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5272d 03h /openrisc/trunk/or1ksim/testsuite/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5273d 05h /openrisc/trunk/or1ksim/testsuite/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5275d 04h /openrisc/trunk/or1ksim/testsuite/
106 Removing old tests, pending addition of new ones. jeremybennett 5275d 04h /openrisc/trunk/or1ksim/testsuite/
104 Candidate release 0.4.0rc4 jeremybennett 5278d 11h /openrisc/trunk/or1ksim/testsuite/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5287d 05h /openrisc/trunk/or1ksim/testsuite/
99 Bug in test evaluation for library fixed. jeremybennett 5292d 05h /openrisc/trunk/or1ksim/testsuite/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5293d 06h /openrisc/trunk/or1ksim/testsuite/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5307d 12h /openrisc/trunk/or1ksim/testsuite/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5310d 06h /openrisc/trunk/or1ksim/testsuite/
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5314d 04h /openrisc/trunk/or1ksim/testsuite/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.