OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] - Rev 118

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5126d 08h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5128d 11h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5129d 11h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5129d 12h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5130d 11h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5133d 12h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
106 Removing old tests, pending addition of new ones. jeremybennett 5133d 12h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5145d 13h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5151d 14h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5165d 20h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.		 jeremybennett 5168d 14h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5179d 12h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.