OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [mc-async/] - Rev 110

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
110 or1ksim make check should work without a libc in the or32-elf tools julius 5242d 04h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5256d 05h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5262d 06h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5276d 12h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5279d 05h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5290d 04h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.