OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or_debug_proxy/] - Rev 861

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
682 Fixed error message in Makefile skrzyp 4631d 17h /openrisc/trunk/or_debug_proxy/
646 Support ORSoC FT4232 board by using second JTAG; should make a command line option. yannv 4798d 18h /openrisc/trunk/or_debug_proxy/
529 or_debug_proxy updates julius 4945d 07h /openrisc/trunk/or_debug_proxy/
498 or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, julius 4990d 18h /openrisc/trunk/or_debug_proxy/
497 or_debug_proxy updates julius 4991d 14h /openrisc/trunk/or_debug_proxy/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 5095d 11h /openrisc/trunk/or_debug_proxy/
376 Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.

Adding ChangeLog to or_debug_proxy
julius 5154d 18h /openrisc/trunk/or_debug_proxy/
353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.
julius 5171d 12h /openrisc/trunk/or_debug_proxy/
109 or_debug_proxy does signals with signals, just ignores signals julius 5263d 18h /openrisc/trunk/or_debug_proxy/
94 Finally added byte reading to or_debug_proxy julius 5303d 07h /openrisc/trunk/or_debug_proxy/
79 Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board julius 5324d 13h /openrisc/trunk/or_debug_proxy/
47 debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions julius 5541d 18h /openrisc/trunk/or_debug_proxy/
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5547d 18h /openrisc/trunk/or_debug_proxy/
45 Orpsoc eth test fix and script error message update julius 5554d 18h /openrisc/trunk/or_debug_proxy/
39 Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update julius 5631d 18h /openrisc/trunk/or_debug_proxy/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.