OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 637

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file
stekern 4820d 08h /openrisc/trunk/orpsocv2/
633 orpsoc: add Digilent Atlys spartan6 board README

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
632 orpsoc: add Digilent Atlys spartan6 board sw include file

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
631 orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
629 orpsoc: add Digilent Atlys spartan6 board or1ksim configuration

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
627 orpsoc: add Digilent Atlys spartan6 board rtl

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4820d 08h /openrisc/trunk/orpsocv2/
619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson
julius 4841d 14h /openrisc/trunk/orpsocv2/
618 Remove unused parameter Tp olof 4841d 22h /openrisc/trunk/orpsocv2/
570 Fix white space in ethmac headers olof 4856d 17h /openrisc/trunk/orpsocv2/
568 OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation julius 4873d 01h /openrisc/trunk/orpsocv2/
567 ORPSoC ethmac test and diagnosis software program updates. julius 4873d 04h /openrisc/trunk/orpsocv2/
564 Update docs for new modules sub directory olof 4885d 13h /openrisc/trunk/orpsocv2/
563 Search for external cores in <board>/modules path olof 4885d 14h /openrisc/trunk/orpsocv2/
562 ORPSoC - board modelsim makefile tab/space fixup julius 4892d 22h /openrisc/trunk/orpsocv2/
560 ORPSoC update - update make scripts, XILINX_PATH setup changes.

Note - may require a change to XILINX_PATH on user systems.
julius 4893d 13h /openrisc/trunk/orpsocv2/
558 ORPSoC makefile script fragments update. julius 4896d 02h /openrisc/trunk/orpsocv2/
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4904d 00h /openrisc/trunk/orpsocv2/
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4904d 17h /openrisc/trunk/orpsocv2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.