OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 675

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
673 Multiple 64-bit fixes (mostly sign and size of constants). Fix bug #1. yannv 4705d 21h /openrisc/trunk/orpsocv2/
672 ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled

OR1200 RTL fix and software test added.		 julius 4709d 13h /openrisc/trunk/orpsocv2/
671 ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model julius 4709d 13h /openrisc/trunk/orpsocv2/
662 minor corrections to clean simulation files paknick 4735d 18h /openrisc/trunk/orpsocv2/
661 added makefile for icarus simulation paknick 4735d 18h /openrisc/trunk/orpsocv2/
660 updated makefiles for simulation with altera ordb2a-ep4ce22 paknick 4735d 20h /openrisc/trunk/orpsocv2/
656 orpsoc: cfi_ctrl software driver fix to allow compilation when it's not used julius 4760d 14h /openrisc/trunk/orpsocv2/
655 ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation julius 4760d 15h /openrisc/trunk/orpsocv2/
652 Fix make compile.tcl for actel backend yannv 4768d 22h /openrisc/trunk/orpsocv2/
651 ORPSoC: The ability to use a free/gimped version of Modelsim was restricted to
the reference build's scripts. This patch adds support for it to the
scripts for the board builds as well.

Signed-off-by: Julius Baxter <julius at opencores.org>
acked-by: Stefan Kristiansson <stefan.kristiansson at saunalahti.fi>		 julius 4773d 17h /openrisc/trunk/orpsocv2/
650 ORPSoC: documentation update to fix explanation of Xilinx environment setup, add section for Atlys board, various cleanups julius 4774d 14h /openrisc/trunk/orpsocv2/
638 orpsoc: xilinx: use XILINX env variable

instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4815d 08h /openrisc/trunk/orpsocv2/
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
633 orpsoc: add Digilent Atlys spartan6 board README

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
632 orpsoc: add Digilent Atlys spartan6 board sw include file

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
631 orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
629 orpsoc: add Digilent Atlys spartan6 board or1ksim configuration

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/
627 orpsoc: add Digilent Atlys spartan6 board rtl

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4820d 08h /openrisc/trunk/orpsocv2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.