URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 50

Rev	Log message	Author	Age	Path
50	Adding or32_funcs.S	julius	5434d 12h	/openrisc/trunk/orpsocv2/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5453d 02h	/openrisc/trunk/orpsocv2/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5468d 13h	/openrisc/trunk/orpsocv2/
45	Orpsoc eth test fix and script error message update	julius	5475d 13h	/openrisc/trunk/orpsocv2/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5504d 13h	/openrisc/trunk/orpsocv2/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5528d 10h	/openrisc/trunk/orpsocv2/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5544d 06h	/openrisc/trunk/orpsocv2/
41	Update to or1k top	julius	5547d 08h	/openrisc/trunk/orpsocv2/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5548d 13h	/openrisc/trunk/orpsocv2/
36	Better clean rule in makefile	julius	5562d 14h	/openrisc/trunk/orpsocv2/
6	Checking in ORPSoCv2	julius	5567d 01h	/openrisc/trunk/orpsocv2/