Rev |
Log message |
Author |
Age |
Path |
415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
5093d 06h |
/openrisc/trunk/orpsocv2/ |
412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
5096d 20h |
/openrisc/trunk/orpsocv2/ |
411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
5097d 08h |
/openrisc/trunk/orpsocv2/ |
410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
5098d 08h |
/openrisc/trunk/orpsocv2/ |
409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
5098d 08h |
/openrisc/trunk/orpsocv2/ |
408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
5098d 20h |
/openrisc/trunk/orpsocv2/ |
403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
5100d 02h |
/openrisc/trunk/orpsocv2/ |
398 |
ORPSoCv2 removing generic backend path - not needed |
julius |
5101d 09h |
/openrisc/trunk/orpsocv2/ |
397 |
ORPSoCv2:
doc/ path added, with Texinfo documentation. Still a work in progress.
VPI files updated.
OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.
Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build. |
julius |
5102d 07h |
/openrisc/trunk/orpsocv2/ |
396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
5105d 06h |
/openrisc/trunk/orpsocv2/ |
395 |
ORPSoCv2 moving ethernet tests to correct place |
julius |
5105d 07h |
/openrisc/trunk/orpsocv2/ |
394 |
ORPSoCv2 removing unused directories |
julius |
5105d 07h |
/openrisc/trunk/orpsocv2/ |
393 |
ORPSoCv2 software rearrangement in progress. Basic tests should now run again. |
julius |
5105d 07h |
/openrisc/trunk/orpsocv2/ |
392 |
ORPSoCv2 software path reorganisation stage 1. |
julius |
5105d 23h |
/openrisc/trunk/orpsocv2/ |
391 |
Removing modules no longer needed in ORPSoCv2 |
julius |
5106d 23h |
/openrisc/trunk/orpsocv2/ |
374 |
ORPSoCv2 adding some files forgotten from last checkin |
julius |
5138d 06h |
/openrisc/trunk/orpsocv2/ |
373 |
ORPSoCv2 software update for compatibility with OR toolchain 1.0 |
julius |
5138d 06h |
/openrisc/trunk/orpsocv2/ |
364 |
OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.
OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)
OR1200 spec updated to version 0.9, various updates.
OR1200 in ORPSoC and main OR1200 in sync, only difference is defines. |
julius |
5150d 04h |
/openrisc/trunk/orpsocv2/ |
363 |
ORPSoC's RTL code fixed to pass linting by Verilator.
ORPSoC's debug interface disabled for now in both RTL and System C top level.
Profiled building of cycle-accurate model now done correctly. |
julius |
5150d 13h |
/openrisc/trunk/orpsocv2/ |
362 |
ORPSoCv2 verilator building working again. Board build fixes to follow |
julius |
5151d 23h |
/openrisc/trunk/orpsocv2/ |