URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] - Rev 43

Rev	Log message	Author	Age	Path
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5498d 19h	/openrisc/trunk/orpsocv2/bench/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5503d 02h	/openrisc/trunk/orpsocv2/bench/
6	Checking in ORPSoCv2	julius	5521d 14h	/openrisc/trunk/orpsocv2/bench/