OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [include/] - Rev 836

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
655 ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation julius 4771d 13h /openrisc/trunk/orpsocv2/bench/verilog/include/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 5032d 00h /openrisc/trunk/orpsocv2/bench/verilog/include/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5125d 09h /openrisc/trunk/orpsocv2/bench/verilog/include/
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5126d 14h /openrisc/trunk/orpsocv2/bench/verilog/include/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.