URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] - Rev 415

Rev	Log message	Author	Age	Path
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	5109d 23h	/openrisc/trunk/orpsocv2/boards/actel/
411	Improved ethmac testbench and software. Renamed some OR1200 library functions to be more generic. Fixed bug with versatile_mem_ctrl for Actel board. Added ability to simulate gatelevel modules alongside RTL modules in board build.	julius	5114d 01h	/openrisc/trunk/orpsocv2/boards/actel/
409	ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it. Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build. Updated documentation.	julius	5115d 01h	/openrisc/trunk/orpsocv2/boards/actel/
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5115d 13h	/openrisc/trunk/orpsocv2/boards/actel/