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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] - Rev 425

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425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4936d 16h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4945d 01h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4949d 03h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4950d 03h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4950d 15h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/

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