| Rev |
Log message |
Author |
Age |
Path |
| 568 |
OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation |
julius |
4877d 22h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 563 |
Search for external cores in <board>/modules path |
olof |
4890d 11h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 560 |
ORPSoC update - update make scripts, XILINX_PATH setup changes.
Note - may require a change to XILINX_PATH on user systems. |
julius |
4898d 09h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4921d 12h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4944d 22h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4988d 09h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4990d 13h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4991d 17h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4992d 10h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4994d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
5008d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5021d 18h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5025d 22h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
5043d 03h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
5044d 02h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
5045d 18h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5046d 22h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 468 |
ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI |
julius |
5051d 23h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 449 |
ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.
Replace use of "clean-all" with "distclean" as make rule to clean things. |
julius |
5078d 13h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 439 |
ORPSoC update
Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST
Multiply/divide tests for to run on target.
Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.
Added ability to use ram_wb as internal memory on ML501 design.
Fixed ethernet MAC tests for ML501. |
julius |
5085d 17h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
