| Rev |
Log message |
Author |
Age |
Path |
| 677 |
atlys: add 2-clock synchronizer chain for ddr2_calib_done
The signal ddr2_calib_done signal comes from the ddr2 clock domain,
while wb_req is treating it as if it came from wb_clk domain. As a
result the timing analysis tool assumed a worst case scenario of 5ns
between the two domains and the results were miserable.
While we can argue that this is a multi-cycle path, the fact is that
ddr2_calib_done feeds into multiple logic sinks and can potentially
cause meta-stability issue in the design. The solution is to add a
2-clock meta-stability filter to address both the timing problems and
the meta-stability concern.
Signed-off-by: Jason Zheng <jxzheng@gmail.com>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Acked-by: Olof Kindgren <olof.kindgren@orsoc.se> |
stekern |
4651d 12h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 655 |
ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation |
julius |
4773d 07h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 638 |
orpsoc: xilinx: use XILINX env variable
instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4828d 01h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 634 |
orpsoc: atlys: autoregenerate coregen cores
Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 633 |
orpsoc: add Digilent Atlys spartan6 board README
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 632 |
orpsoc: add Digilent Atlys spartan6 board sw include file
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 631 |
orpsoc: add Digilent Atlys spartan6 board testbench
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 630 |
orpsoc: add Digilent Atlys spartan6 board backend
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 629 |
orpsoc: add Digilent Atlys spartan6 board or1ksim configuration
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 628 |
orpsoc: add Digilent Atlys spartan6 board Makefiles
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 627 |
orpsoc: add Digilent Atlys spartan6 board rtl
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4833d 00h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 568 |
OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation |
julius |
4885d 17h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 563 |
Search for external cores in <board>/modules path |
olof |
4898d 07h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 560 |
ORPSoC update - update make scripts, XILINX_PATH setup changes.
Note - may require a change to XILINX_PATH on user systems. |
julius |
4906d 05h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4929d 08h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4952d 18h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4996d 05h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4998d 09h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4999d 13h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
5000d 06h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
