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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [backend/] - Rev 478

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Rev Log message Author Age Path
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4876d 12h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4909d 07h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 4944d 11h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/

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