URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [backend/] [par/] - Rev 449

Rev	Log message	Author	Age	Path
449	ORPSoC - or1200_monitor.v additions enabling new experimental execution checks. Replace use of "clean-all" with "distclean" as make rule to clean things.	julius	5085d 15h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/par/
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	5120d 19h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/par/
69	ORPSoC xilinx ml501 board update - added ethernet eupport and software test	julius	5383d 07h	/par/
67	New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory	julius	5386d 01h	/par/