OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [bench/] - Rev 482

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
482 ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes. julius 4953d 00h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4954d 02h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4996d 15h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 5024d 16h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5028d 06h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5083d 13h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5287d 03h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5289d 22h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.