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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] - Rev 449

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Rev Log message Author Age Path
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 5081d 13h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 5088d 04h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 5101d 04h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 5109d 14h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5113d 03h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5372d 01h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5374d 20h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/

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