OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [sim/] - Rev 412

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5113d 00h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/
71 ORPSoC board builds, adding readmes julius 5367d 16h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5371d 22h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5374d 16h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.