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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [syn/] - Rev 431

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Rev Log message Author Age Path
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 5124d 05h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/syn/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5386d 16h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/syn/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5389d 11h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/syn/

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