URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] - Rev 54

Rev	Log message	Author	Age	Path
54	wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist	julius	5447d 04h	/openrisc/trunk/orpsocv2/rtl/
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5480d 03h	/openrisc/trunk/orpsocv2/rtl/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5498d 21h	/openrisc/trunk/orpsocv2/rtl/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5514d 08h	/openrisc/trunk/orpsocv2/rtl/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5550d 08h	/openrisc/trunk/orpsocv2/rtl/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5574d 05h	/openrisc/trunk/orpsocv2/rtl/
41	Update to or1k top	julius	5593d 03h	/openrisc/trunk/orpsocv2/rtl/
6	Checking in ORPSoCv2	julius	5612d 20h	/openrisc/trunk/orpsocv2/rtl/