OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] - Rev 57

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
57 ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words julius 5335d 02h /openrisc/trunk/orpsocv2/rtl/
55 Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk julius 5345d 18h /openrisc/trunk/orpsocv2/rtl/
54 wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist julius 5356d 02h /openrisc/trunk/orpsocv2/rtl/
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5389d 01h /openrisc/trunk/orpsocv2/rtl/
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5407d 18h /openrisc/trunk/orpsocv2/rtl/
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5423d 06h /openrisc/trunk/orpsocv2/rtl/
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5459d 05h /openrisc/trunk/orpsocv2/rtl/
43 Couple of fixes to ORPSoC, new linux patch version in toolchain script julius 5483d 02h /openrisc/trunk/orpsocv2/rtl/
41 Update to or1k top julius 5502d 00h /openrisc/trunk/orpsocv2/rtl/
6 Checking in ORPSoCv2 julius 5521d 17h /openrisc/trunk/orpsocv2/rtl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.