OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] - Rev 801

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
801 ORPSoC: Fix bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88
julius 4403d 05h /openrisc/trunk/orpsocv2/rtl/verilog/
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.
julius 4436d 14h /openrisc/trunk/orpsocv2/rtl/verilog/
788 or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
julius 4461d 04h /openrisc/trunk/orpsocv2/rtl/verilog/
679 Allow setting the boot address as an external
parameter. If no parameter is used, the value
from OR1200_BOOT_ADR will be used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
olof 4485d 05h /openrisc/trunk/orpsocv2/rtl/verilog/
672 ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled

OR1200 RTL fix and software test added.
julius 4564d 00h /openrisc/trunk/orpsocv2/rtl/verilog/
655 ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation julius 4615d 02h /openrisc/trunk/orpsocv2/rtl/verilog/
619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson
julius 4696d 02h /openrisc/trunk/orpsocv2/rtl/verilog/
618 Remove unused parameter Tp olof 4696d 09h /openrisc/trunk/orpsocv2/rtl/verilog/
570 Fix white space in ethmac headers olof 4711d 04h /openrisc/trunk/orpsocv2/rtl/verilog/
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4758d 11h /openrisc/trunk/orpsocv2/rtl/verilog/
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4759d 04h /openrisc/trunk/orpsocv2/rtl/verilog/
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4765d 06h /openrisc/trunk/orpsocv2/rtl/verilog/
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4765d 13h /openrisc/trunk/orpsocv2/rtl/verilog/
537 ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. julius 4782d 01h /openrisc/trunk/orpsocv2/rtl/verilog/
536 ORPSoC - removing duplicate ethmac toplevel file. julius 4785d 14h /openrisc/trunk/orpsocv2/rtl/verilog/
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4794d 13h /openrisc/trunk/orpsocv2/rtl/verilog/
506 ORPSoC or1200 interrupt and syscall generation test julius 4820d 07h /openrisc/trunk/orpsocv2/rtl/verilog/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement
julius 4820d 08h /openrisc/trunk/orpsocv2/rtl/verilog/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4837d 04h /openrisc/trunk/orpsocv2/rtl/verilog/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4838d 00h /openrisc/trunk/orpsocv2/rtl/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.