URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] - Rev 49

Rev	Log message	Author	Age	Path
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5480d 18h	/openrisc/trunk/orpsocv2/rtl/verilog/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5496d 05h	/openrisc/trunk/orpsocv2/rtl/verilog/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5532d 04h	/openrisc/trunk/orpsocv2/rtl/verilog/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5556d 01h	/openrisc/trunk/orpsocv2/rtl/verilog/
41	Update to or1k top	julius	5574d 23h	/openrisc/trunk/orpsocv2/rtl/verilog/
6	Checking in ORPSoCv2	julius	5594d 16h	/openrisc/trunk/orpsocv2/rtl/verilog/