URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [smii/] - Rev 600

Rev	Log message	Author	Age	Path
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5123d 08h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
403	ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly.	julius	5124d 13h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
360	First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken	julius	5176d 15h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
55	Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk	julius	5477d 12h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5539d 12h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5590d 23h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
6	Checking in ORPSoCv2	julius	5653d 11h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/