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Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [smii/] - Rev 482

Rev	Log message	Author	Age	Path
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5025d 17h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
403	ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly.	julius	5026d 22h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
360	First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken	julius	5079d 00h	/openrisc/trunk/orpsocv2/rtl/verilog/smii/
55	Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk	julius	5379d 21h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5441d 21h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5493d 08h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/
6	Checking in ORPSoCv2	julius	5555d 20h	/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/