URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] - Rev 42

Rev	Log message	Author	Age	Path
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5483d 02h	/openrisc/trunk/orpsocv2/sim/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5487d 09h	/openrisc/trunk/orpsocv2/sim/
36	Better clean rule in makefile	julius	5501d 09h	/openrisc/trunk/orpsocv2/sim/
6	Checking in ORPSoCv2	julius	5505d 21h	/openrisc/trunk/orpsocv2/sim/