URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] - Rev 52

Rev	Log message	Author	Age	Path
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5363d 02h	/openrisc/trunk/orpsocv2/sim/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5381d 20h	/openrisc/trunk/orpsocv2/sim/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5433d 06h	/openrisc/trunk/orpsocv2/sim/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5457d 03h	/openrisc/trunk/orpsocv2/sim/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5473d 00h	/openrisc/trunk/orpsocv2/sim/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5477d 07h	/openrisc/trunk/orpsocv2/sim/
36	Better clean rule in makefile	julius	5491d 07h	/openrisc/trunk/orpsocv2/sim/
6	Checking in ORPSoCv2	julius	5495d 19h	/openrisc/trunk/orpsocv2/sim/