URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] [bin/] - Rev 53

Rev	Log message	Author	Age	Path
53	Fixed incorrect commandline option for ORPSoC and main makefile setting	julius	5508d 09h	/openrisc/trunk/orpsocv2/sim/bin/
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5523d 07h	/openrisc/trunk/orpsocv2/sim/bin/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5542d 01h	/openrisc/trunk/orpsocv2/sim/bin/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5593d 12h	/openrisc/trunk/orpsocv2/sim/bin/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5617d 09h	/openrisc/trunk/orpsocv2/sim/bin/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5633d 06h	/openrisc/trunk/orpsocv2/sim/bin/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5637d 12h	/openrisc/trunk/orpsocv2/sim/bin/
36	Better clean rule in makefile	julius	5651d 13h	/openrisc/trunk/orpsocv2/sim/bin/
6	Checking in ORPSoCv2	julius	5656d 00h	/openrisc/trunk/orpsocv2/sim/bin/