| Rev |
Log message |
Author |
Age |
Path |
| 506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4966d 13h |
/openrisc/trunk/orpsocv2/sw/ |
| 505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4966d 14h |
/openrisc/trunk/orpsocv2/sw/ |
| 504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4983d 10h |
/openrisc/trunk/orpsocv2/sw/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4986d 10h |
/openrisc/trunk/orpsocv2/sw/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4988d 06h |
/openrisc/trunk/orpsocv2/sw/ |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4990d 17h |
/openrisc/trunk/orpsocv2/sw/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
5014d 16h |
/openrisc/trunk/orpsocv2/sw/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
5014d 17h |
/openrisc/trunk/orpsocv2/sw/ |
| 487 |
ORPSoC main software makefile update |
julius |
5017d 14h |
/openrisc/trunk/orpsocv2/sw/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5017d 14h |
/openrisc/trunk/orpsocv2/sw/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5021d 19h |
/openrisc/trunk/orpsocv2/sw/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
5039d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
5041d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5042d 18h |
/openrisc/trunk/orpsocv2/sw/ |
| 470 |
ORPSoC OR1200 crt0 updates. |
julius |
5046d 18h |
/openrisc/trunk/orpsocv2/sw/ |
| 468 |
ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI |
julius |
5047d 20h |
/openrisc/trunk/orpsocv2/sw/ |
| 466 |
ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README |
julius |
5048d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 465 |
ORPSoC SPI flash load Makefile and README updates. |
julius |
5049d 13h |
/openrisc/trunk/orpsocv2/sw/ |
| 462 |
ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.
RAM models updated. |
julius |
5049d 22h |
/openrisc/trunk/orpsocv2/sw/ |
| 449 |
ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.
Replace use of "clean-all" with "distclean" as make rule to clean things. |
julius |
5074d 09h |
/openrisc/trunk/orpsocv2/sw/ |
