URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] - Rev 421

Rev	Log message	Author	Age	Path
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	4996d 09h	/openrisc/trunk/orpsocv2/sw/drivers/
411	Improved ethmac testbench and software. Renamed some OR1200 library functions to be more generic. Fixed bug with versatile_mem_ctrl for Actel board. Added ability to simulate gatelevel modules alongside RTL modules in board build.	julius	5000d 11h	/openrisc/trunk/orpsocv2/sw/drivers/
409	ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it. Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build. Updated documentation.	julius	5001d 11h	/openrisc/trunk/orpsocv2/sw/drivers/
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5001d 23h	/openrisc/trunk/orpsocv2/sw/drivers/
403	ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly.	julius	5003d 05h	/openrisc/trunk/orpsocv2/sw/drivers/
396	ORPSoCv2 final software fixes...for now. See updated README	julius	5008d 09h	/openrisc/trunk/orpsocv2/sw/drivers/
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5008d 10h	/openrisc/trunk/orpsocv2/sw/drivers/